/**
  ******************************************************************************
  * @file    main.c
  * @author  MCU Application Team
  * @brief   Main program body
  ******************************************************************************
  * @attention
  *
  * <h2><center>&copy; Copyright (c) 2023 Puya Semiconductor Co.
  * All rights reserved.</center></h2>
  *
  * This software component is licensed by Puya under BSD 3-Clause license,
  * the "License"; You may not use this file except in compliance with the
  * License. You may obtain a copy of the License at:
  *                        opensource.org/licenses/BSD-3-Clause
  *
  ******************************************************************************
  * @attention
  *
  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  * All rights reserved.</center></h2>
  *
  * This software component is licensed by ST under BSD 3-Clause license,
  * the "License"; You may not use this file except in compliance with the
  * License. You may obtain a copy of the License at:
  *                        opensource.org/licenses/BSD-3-Clause
  *
  ******************************************************************************
  */

/* Includes ------------------------------------------------------------------*/
#include "ms32c0xx.h"

/* Private define ------------------------------------------------------------*/
#define HSI_TIMEOUT_VALUE          ((uint32_t)100)  /* 100 ms */
#define CLOCKSWITCH_TIMEOUT_VALUE  ((uint32_t)5000) /* 5 s    */

#define ERROR_HSI_TIMEOUT          0x01
#define ERROR_CLKSWITCH_TIMEOUT    0x02

/* Private variables ---------------------------------------------------------*/
static __IO uint32_t Tick;
volatile uint16_t error = 0; 

/* Private user code ---------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
static __INLINE void APP_SystemClockConfig(void);
static __INLINE void APP_TIMConfig(void);

/**
  * @brief  Main program.
  * @param  None
  * @retval int
  */
int main(void)
{
  SysTick_Config(8000); /* 1ms config */
  APP_SystemClockConfig();

  RCC->APBENR1 |= (RCC_APBENR1_PWREN);  
  RCC->APBENR2 |= (RCC_APBENR2_SYSCFGEN);

  if (error != 0)
  {
    while(1) /* endless loop */
    {
    }
  }

  APP_TIMConfig();

  while (1) /* Infinite loop */
  {   

  }
}

/**
  * @brief   This function configures the TIMx as One Pulse Mode
  * @param   None
  * @retval  None
  */
static __INLINE void APP_TIMConfig(void)
{
  /* (1) Enable the peripheral clock of TIM1 */
  /* (2) Enable the peripheral clock of GPIOA */
  /* (3) Select Alternate function mode (10) on GPIOA pin 3 and pin 5 */  
  /* (4) Select TIM1_CH1 on PA5 by enabling AF2 for pin 5 in GPIOA AFRL register 
                TIM1_CH2 on PA3 by enabling AF2 for pin 3 */ 

  RCC->APBENR2 |= RCC_APBENR2_TIM1EN; /* (1) */
  RCC->IOPENR |= RCC_IOPENR_GPIOAEN; /* (2) */
  GPIOA->MODER = (GPIOA->MODER & ~(GPIO_MODER_MODE3 | GPIO_MODER_MODE5)) \
               | (GPIO_MODER_MODE3_1) | (GPIO_MODER_MODE5_1); /* (3) */  
  GPIOA->AFR = (GPIOA->AFR & ~(GPIO_AFR_AFSEL3 | GPIO_AFR_AFSEL5)) \
                | (0x2 << (3 * 4 ))| (0x2 << (5 * 4 )) ; /* (4) */
  
  
  /* Use TI1FP1 as trigger 1 */
  /* (1) Map TI1FP1 on TI1 by writing CC1S=01 in the TIMx_CCMR1 register */
  /* (2) TI1FP1 must detect a rising edge, write CC1P=0 and CC1NP=0 
         in the TIMx_CCER register (keep the reset value) */
  /* (3) Configure TI1FP1 as trigger for the slave mode controller (TRGI) 
         by writing TS=101 in the TIMx_SMCR register 
         TI1FP1 is used to start the counter by writing SMS to 110' 
         in the TIMx_SMCR register (trigger mode) */
  TIM1->CCMR1 = (TIM1->CCMR1 &~ TIM_CCMR1_CC1S) | TIM_CCMR1_CC1S_0; /* (1) */
  /* TIM1->CCER &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); */ /* (2) */
  TIM1->SMCR = (TIM1->SMCR &~ (TIM_SMCR_TS | TIM_SMCR_SMS )) | TIM_SMCR_TS_2 | TIM_SMCR_TS_0 
              | TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1; /* (3) */
  
  /* The OPM waveform is defined by writing the compare registers */
  /* (1) Set prescaler to 7, so APBCLK/8 i.e 1MHz */ 
  /* (2) Set ARR = 100-1, as timer clock is 1MHz the period is 1 ms */
  /* (3) Set CCRx = 200, the burst will be delayed for 200 us (must be > 0)*/
  /* (4) Select PWM mode 2 on OC2  (OC2M = 111),
         enable preload register on OC2 (OC2PE = 1, reset value) 
         enable fast enable (no delay) if PULSE_WITHOUT_DELAY is set*/
  /* (5) Select active high polarity on OC2 (CC2P = 0, reset value),
         enable the output on OC2 (CC2E = 1)*/
  /* (6) Write '1 in the OPM bit in the TIMx_CR1 register to stop the counter 
         at the next update event (OPM = 1)
         enable auto-reload register(ARPE = 1) */
  /* (7) Enable output */
  
  TIM1->PSC = 7; /* (1) */
  TIM1->ARR = 1000-1; /* (2) */
  TIM1->CCR2 = 200-1; /* (3) */
  TIM1->CCMR1 = (TIM1->CCMR1 &~ TIM_CCMR1_OC2M) | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_0 
               | TIM_CCMR1_OC2PE 
#if PULSE_WITHOUT_DELAY > 0
               | TIM_CCMR1_OC2FE
#endif                 
               ; /* (4) */
  TIM1->CCER |= TIM_CCER_CC2E; /* (5) */
  TIM1->CR1 |= TIM_CR1_OPM | TIM_CR1_ARPE; /* (6) */
  TIM1->BDTR |= TIM_BDTR_MOE; /* (7) */
}

/**
  * @brief  This function configures the system clock @8MHz 
  *         assuming the registers have their reset value before the call.
  *         SYSTEM CLOCK  = HSI DIV1
  *         FLASH LATENCY = 0
  * @param  None
  * @retval None
  */
static __INLINE void APP_SystemClockConfig(void)
{
  uint32_t tickstart = 0;
  /* (1) HSI DIV1 and Enable HSI */
  /* (2) Set HSI 8M and Triming Data */
  /* (3) Wait for HSI ready flag */
  /* (4) Set AHB divider:HCLK = SYSCLK */
  /* (5) Select HSISYS as system clock */
  /* (6) Wait for clock switched on HSI */
  /* (7) Set APB divider:PCLK = HCLK */

  RCC->CR = (RCC->CR &~(RCC_CR_HSIDIV)) | RCC_CR_HSION;                        /* (1) */

  RCC->ICSCR = (RCC->ICSCR & 0xFFFE0000) | (0 << RCC_ICSCR_HSI_FS_CR_Pos) | \
               ((*(uint32_t *)(0x1FFF0080)) & 0xFFFF);                         /* (2) */

  tickstart = Tick;
  while ((RCC->CR & (RCC_CR_HSIRDY)) != (RCC_CR_HSIRDY ))                      /* (3) */
  {
    if ((Tick - tickstart ) > HSI_TIMEOUT_VALUE)
    {
      error = ERROR_HSI_TIMEOUT; /* Report an error */
      return;
    }
  }

  RCC->CFGR = (RCC->CFGR & ~(RCC_CFGR_HPRE));                                  /* (4) */

  RCC->CFGR = (RCC->CFGR & ~(RCC_CFGR_SW)) | RCC_CFGR_SW_HSISYS;               /* (5) */
  tickstart = Tick;
  while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSISYS)                    /* (6) */
  {
    if ((Tick - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
    {
      error = ERROR_CLKSWITCH_TIMEOUT; /* Report an error */
      return;
    }
  }
 
  RCC->CFGR = (RCC->CFGR & ~(RCC_CFGR_PPRE));                                  /* (7) */
}

/******************************************************************************/
/*            Cortex-M0 Plus Processor Exceptions Handlers                    */
/******************************************************************************/

/**
  * @brief  This function handles NMI exception.
  * @param  None
  * @retval None
  */
void NMI_Handler(void)
{
}

/**
  * @brief  This function handles Hard Fault exception.
  * @param  None
  * @retval None
  */
void HardFault_Handler(void)
{
  /* Go to infinite loop when Hard Fault exception occurs */
  while (1)
  {
  }
}

/**
  * @brief  This function handles SVCall exception.
  * @param  None
  * @retval None
  */
void SVC_Handler(void)
{
}

/**
  * @brief  This function handles PendSVC exception.
  * @param  None
  * @retval None
  */
void PendSV_Handler(void)
{
}


/**
  * @brief  This function handles SysTick Handler.
  * @param  None
  * @retval None
  */
void SysTick_Handler(void)
{
  Tick++;
}

/******************************************************************************/
/*                 MS32C001B Peripherals Interrupt Handlers                   */
/*  Add here the Interrupt Handler for the used peripheral(s) (PPP), for the  */
/*  available peripheral interrupt handler's name please refer to the startup */
/*  file (startup_ms32c001bxx.s).                                             */
/******************************************************************************/


/************************ (C) COPYRIGHT Puya *****END OF FILE******************/
